With the trend to continue to miniaturize semiconductor integrated circuits to achieve submicron feature sizes, photolithography has become one of the most critical steps in semiconductor manufacturing. The goal of photolithography in establishing the horizontal dimensions of the various devices and circuits is to create a pattern which meets design requirements as well as to correctly align the circuit pattern on the surface of the wafer.
As line widths shrink smaller and smaller in submicron photolithography, the process to print lines in photoresist becomes increasingly more difficult. Photoresists have been developed to keep pace with the industry's need to print narrower lines with fewer defects. The selection of the photoresist must be made on whether the photoresist has the capability of producing the design dimensions. The resist must also be able to function as an etchant barrier during the etching step and be free of pinholes. Furthermore, the selection of photoresist must provide for process latitude and step coverage capabilities.
Exposure light sources are chosen in photolithography based upon the characteristics of the photoresist. Standard production exposure tools used to print lines may limit how small the devices can be made. One problem with standard exposure tools is in the auto focus mechanism used to pattern a wafer. The exposure tools, when used in conjunction with thick photoresists have a small depth of focus so that light focused on the top of the photoresist will be out of focus near the bottom of the photoresist.
Production tools with light sources having longer wavelengths also create negative optical effects such as diffraction. Diffraction reduces the resolution of an image in the photoresist causing poor image definition.
Smaller features can be imaged clearly by using thinner photoresist layers for a given photoresist chemistry and optical tool. Thinner photoresists, however, are not suitable for all masking requirements because of the reduced ability to protect masked areas.
A concern in printing submicron devices is the resultant angle of the step from the top of the photoresist to the bottom of the layer in which the device is being made. If the angle is too steep, subsequently deposited layers may be too thin over the step and not fill in the spaces between adjacent devices. Thus, step coverage problems result.
Step coverage problems have been of prime importance throughout the history of integrated circuit manufacture. Poor step coverage can be found at the sharp vertical step metal to substrate contacts, metal to metal vias, and metal crossovers. On the other hand, there is a concern in printing submicron devices in close proximity to adjacent devices. Design criteria requires controlling the cross sectional lengths of the devices. Control of the cross sectional lengths of devices is best achieved when the sidewall slopes of the devices are 90 degrees. The critical dimension, or cross sectional length, is then a function of the critical dimension of the photoresist. If the sidewall slope is not 90 degrees, other factors must be considered in determining the critical dimension of the device, such as the angle of the sidewall slope, photoresist selectivity and the photoresist critical dimension.
As stated above, however, step coverage problems arise when the angle of the slope forms a steep sidewall. For example, as the height of a vertical or 90 degree sidewall increases, the percent of step coverage decreases. The ratio of the sidewall height to the space between adjacent structures is the aspect ratio. Device structures with high aspect ratios only increase step coverage problems. The spaces between the devices become harder to fill. On the other hand, sloped sidewall structures have an advantage over structures with sidewalls having a 90 degree angle because of a lower aspect ratio.
In order to increase step coverage while maintaining a lower aspect ratio, a two-tiered stepped sidewall is proposed by this invention. The step heights of each tier of the stepped sidewall are kept at a minimum, thus lowering the equivalent aspect ratio while increasing step coverage.
It would be desirable to provide a method for printing interconnects and gates having stepped sidewalls to enhance step coverage using thin photoresists. It would be further desirable for such fabrication technique to provide stepped sidewall profiles for use with small device geometries by lowering aspect ratios. It would be further desirable for such method to be compatible with current process technologies.